2026 · Article
Bringing Distributed Ordering to Heterogeneous Memory Consistency
IEEE Micro, 2026
Abstract
CORD is a novel cache-coherence protocol that brings distributed-systems techniques to tightly coupled heterogeneous processors, unlocking efficient and programmer-friendly shared memory for emerging heterogeneous workloads such as AI/ML. Cache-coherence protocols have historically enforced consistency at the source processor, inflating application latency and interconnect traffic. Central to CORD’s efficiency is its reframing of heterogeneous coherence as a distributed-systems problem: drawing on logical-timestamp algorithms for event ordering, CORD assigns consistency-tailored timestamps to write-through stores and orders them at the cache directory — near each store’s completion point at the LLC. In our evaluation, CORD approaches message-passing efficiency while incurring a fraction of the programming complexity, with negligible storage, area, and power overheads. The result is a concrete demonstration that long-standing architectural challenges in shared-memory designs can be tackled through the lens of distributed systems.
Publication details
- Venue
- IEEE Micro
- Publication year
- 2026
BibTeX
@article{cord-toppicks,
author = {Yu, Yanpeng and Oswald, Nicolai and Khandelwal, Anurag},
title = {{Bringing Distributed Ordering to Heterogeneous Memory Consistency}},
journal = {IEEE Micro},
month = oct,
year = {2026}
}